In general, most data processors communicate operands with all of the different types of system resources using single bus cycles. However, data processors such as that described in copending U.S. patent application Ser. No. 624,660 now U.S. Pat. No. 4,633,437, are capable of communicating with system resources having data port sizes which are a submultiple of the data port size of the data processor. Due to operand misalignment or port size incompatibility, operand cycles frequently extend over multiple bus cycles. Unfortunately, certain specialized types of system resources, such as emulators, bus state analyzers, and other debugging tools, need to be able to reassemble the bus cycles into the respective operand cycles. Heretofore, no known system provided such a capability.